XC888LM datasheet(106/144 Pages) INFINEON

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XC886/888CLM

Functional Description

Data Sheet

V0.9, 2006-12

3.21

Analog-to-Digital Converter

The XC886/888 includes a high-performance 10-bit Analog-to-Digital Converter (ADC)

with eight multiplexed analog input channels. The ADC uses a successive approximation

technique to convert the analog voltage levels from up to eight different sources. The

analog input channels of the ADC are available at Port 2.

Features

•

Successive approximation

•

8-bit or 10-bit resolution

(TUE of ± 1 LSB and ± 2 LSB, respectively)

•

Eight analog channels

•

Four independent result registers

•

Result data protection for slow CPU access

(wait-for-read mode)

•

Single conversion mode

•

Autoscan functionality

•

Limit checking for conversion results

•

Data reduction filter

(accumulation of up to 2 conversion results)

•

Two independent conversion request sources with programmable priority

•

Selectable conversion request trigger

•

Flexible interrupt generation with configurable service nodes

•

Programmable sample time

•

Programmable clock divider

•

Cancel/restart feature for running conversions

•

Integrated sample and hold circuitry

•

Compensation of offset errors

•

Low power modes

3.21.1

ADC Clocking Scheme

A common module clock

ADC generates the various clock signals used by the analog and

digital parts of the ADC module:

•

ADCA is input clock for the analog part.

•

ADCI is internal clock for the analog part (defines the time base for conversion length

and the sample time). This clock is generated internally in the analog part, based on

the input clock

ADCA to generate a correct duty cycle for the analog components.

•

ADCD is input clock for the digital part.

The internal clock for the analog part

ADCI is limited to a maximum frequency of 10 MHz.

Therefore, the ADC clock prescaler must be programmed to a value that ensures

ADCI

does not exceed 10 MHz. The prescaler ratio is selected by bit field CTC in register

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