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XC888LM Datasheet(PDF) 43 Page - Infineon Technologies AG |
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XC888LM Datasheet(HTML) 43 Page - Infineon Technologies AG |
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43 / 144 page  XC886/888CLM Functional Description Data Sheet 36 V0.9, 2006-12 3.2.4.5 WDT Registers The WDT SFRs can be accessed in the mapped memory area (RMAP = 1). BEH COCON Reset: 00H Clock Output Control Register Bit Field 0 TLEN COUT S COREL Type r rw rw rw E9H MISC_CON Reset: 00H Miscellaneous Control Register Bit Field 0 DFLAS HEN Type r rwh RMAP = 0, PAGE 3 B3H XADDRH Reset: F0H On-chip XRAM Address Higher Order Bit Field ADDRH Type rw B4H IRCON3 Reset: 00H Interrupt Request Register 3 Bit Field 0 CANS RC5 CCU6 SR1 0 CANS RC4 CCU6 SR0 Type r rwh rwh r rwh rwh B5H IRCON4 Reset: 00H Interrupt Request Register 4 Bit Field 0 CANS RC7 CCU6 SR3 0 CANS RC6 CCU6 SR2 Type r rwh rwh r rwh rwh B7H MODPISEL1 Reset: 00H Peripheral Input Select Register 1 Bit Field EXINT 6IS 0 UR1RIS T21EX IS JTAGT DIS1 JTAGT CKS1 Type rw r rw rw rw rw BAH MODPISEL2 Reset: 00H Peripheral Input Select Register 2 Bit Field 0 T21IS T2IS T1IS T0IS Type r rw rw rw rw BBH PMCON2 Reset: 00H Power Mode Control Register 2 Bit Field 0 UART 1_DIS T21_D IS Type r rw rw BDH MODSUSP Reset: 01H Module Suspend Control Register Bit Field 0 T21SU SP T2SUS P T13SU SP T12SU SP WDTS USP Type r rw rw rw rw rw Table 9 WDT Register Overview Addr Register Name Bit 7 6 5 4 3 2 1 0 RMAP = 1 BBH WDTCON Reset: 00H Watchdog Timer Control Register Bit Field 0 WINB EN WDTP R 0 WDTE N WDTR S WDTI N Type r rw rh r rw rwh rw BCH WDTREL Reset: 00H Watchdog Timer Reload Register Bit Field WDTREL Type rw BDH WDTWINB Reset: 00H Watchdog Window-Boundary Count Register Bit Field WDTWINB Type rw Table 8 SCU Register Overview (cont’d) Addr Register Name Bit 7 6 5 4 3 2 1 0 |
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