XC888LM datasheet(71/144 Pages) INFINEON

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XC886/888CLM

Functional Description

Data Sheet

V0.9, 2006-12

3.4.3

Interrupt Priority

An interrupt that is currently being serviced can only be interrupted by a higher-priority

interrupt, but not by another interrupt of the same or lower priority. Hence, an interrupt of

the highest priority cannot be interrupted by any other interrupt request.

If two or more requests of different priority levels are received simultaneously, the

request of the highest priority is serviced first. If requests of the same priority are

received simultaneously, then an internal polling sequence determines which request is

serviced first. Thus, within each priority level, there is a second priority structure

determined by the polling sequence shown in Table 21.

Table 21

Priority Structure within Interrupt Level

Source

Level

Non-Maskable Interrupt (NMI)

(highest)

External Interrupt 0

Timer 0 Interrupt

External Interrupt 1

Timer 1 Interrupt

UART Interrupt

Timer 2,UART Normal Divider Overflow,

MultiCAN, LIN Interrupt

ADC, MultiCAN Interrupt

SSC Interrupt

External Interrupt 2, Timer 21, UART1, UART1

Normal Divider Overflow, MDU, CORDIC Interrupt

External Interrupt [6:3], MultiCAN Interrupt

CCU6 Interrupt Node Pointer 0, MultiCAN interrupt 11

CCU6 Interrupt Node Pointer 1, MultiCAN Interrupt 12

CCU6 Interrupt Node Pointer 2, MultiCAN Interrupt 13

CCU6 Interrupt Node Pointer 3, MultiCAN Interrupt 14

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