XC888LM datasheet(79/144 Pages) INFINEON

79 / 144 page

XC886/888CLM

Functional Description

Data Sheet

V0.9, 2006-12

Note: The boot options are valid only with the default set of UART and JTAG pins.

3.8

Clock Generation Unit

The Clock Generation Unit (CGU) allows great flexibility in the clock generation for the

XC886/888. The power consumption is indirectly proportional to the frequency, whereas

the performance of the microcontroller is directly proportional to the frequency. During

user program execution, the frequency can be programmed for an optimal ratio between

performance and power consumption. Therefore the power consumption can be

adapted to the actual application state.

Features

•

Phase-Locked Loop (PLL) for multiplying clock source by different factors

•PLL Base Mode

•

Prescaler Mode

•PLL Mode

•

Power-down mode support

The CGU consists of an oscillator circuit and a PLL. In the XC886/888, the oscillator can

be from either of these two sources: the on-chip oscillator (9.6 MHz) or the external

oscillator (3 MHz to 12 MHz). The term “oscillator” is used to refer to both on-chip

oscillator and external oscillator, unless otherwise stated. After the reset, the on-chip

oscillator will be used by default.The external oscillator can be selected via software. In

addition, the PLL provides a fail-safe logic to perform oscillator run and loss-of-lock

detection. This allows emergency routines to be executed for system recovery or to

perform system shut down.

1) BSL mode is automatically entered if no valid password is installed and data at memory address 0000H equals

zero.

2) OSC is bypassed in MultiCAN BSL mode

3) Normal user mode with standard JTAG (TCK,TDI,TDO) pins for hot-attach purpose.

XC888LM Datasheet(PDF) 79 Page - Infineon Technologies AG