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XC888LM Datasheet(PDF) 94 Page - Infineon Technologies AG |
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XC888LM Datasheet(HTML) 94 Page - Infineon Technologies AG |
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94 / 144 page ![]() XC886/888CLM Functional Description Data Sheet 87 V0.9, 2006-12 The following formulas calculate the final baud rate without and with the fractional divider respectively: (3.5) (3.6) The maximum baud rate that can be generated is limited to f PCLK/32. Hence, for a module clock of 24 MHz, the maximum achievable baud rate is 0.75 MBaud. Standard LIN protocol can support a maximum baud rate of 20 kHz, the baud rate accuracy is not critical and the fractional divider can be disabled. Only the prescaler is used for auto baud rate calculation. For LIN fast mode, which supports the baud rate of 20 kHz to 115.2 kHz, the higher baud rates require the use of the fractional divider for greater accuracy. Table 30 lists the various commonly used baud rates with their corresponding parameter settings and deviation errors. The fractional divider is disabled and a module clock of 24 MHz is used. The fractional divider allows baud rates of higher accuracy (lower deviation error) to be generated. Table 31 lists the resulting deviation errors from generating a baud rate of 115.2 kHz, using different module clock frequencies. The fractional divider is enabled (fractional divider mode) and the corresponding parameter settings are shown. Table 30 Typical Baud rates for UART with Fractional Divider disabled Baud rate Prescaling Factor (2BRPRE) Reload Value (BR_VALUE + 1) Deviation Error 19.2 kBaud 1 (BRPRE=000 B) 78 (4E H)0.17 % 9600 Baud 1 (BRPRE=000 B) 156 (9C H)0.17 % 4800 Baud 2 (BRPRE=001 B) 156 (9C H)0.17 % 2400 Baud 4 (BRPRE=010 B) 156 (9C H)0.17 % baud rate f PCLK 16 2 BRPRE BR_VALUE 1 + () × × ------------------------------------------------------------------------------------ where 2 BRPRE BR_VALUE 1 + () 1 > × = baud rate f PCLK 16 2 BRPRE BR_VALUE 1 + () × × ------------------------------------------------------------------------------------ STEP 256 --------------- × = |
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