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XC888LM Datasheet(PDF) 47 Page - Infineon Technologies AG |
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XC888LM Datasheet(HTML) 47 Page - Infineon Technologies AG |
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47 / 144 page  XC886/888CLM Functional Description Data Sheet 40 V0.9, 2006-12 CDH ADC_LCBR Reset: B7H Limit Check Boundary Register Bit Field BOUND1 BOUND0 Type rw rw CEH ADC_INPCR0 Reset: 00H Input Class 0 Register Bit Field STC Type rw CFH ADC_ETRCR Reset: 00H External Trigger Control Register Bit Field SYNE N1 SYNE N0 ETRSEL1 ETRSEL0 Type rw rw rw rw RMAP = 0, PAGE 1 CAH ADC_CHCTR0 Reset: 00H Channel Control Register 0 Bit Field 0 LCC 0 RESRSEL Type r rw r rw CBH ADC_CHCTR1 Reset: 00H Channel Control Register 1 Bit Field 0 LCC 0 RESRSEL Type r rw r rw CCH ADC_CHCTR2 Reset: 00H Channel Control Register 2 Bit Field 0 LCC 0 RESRSEL Type r rw r rw CDH ADC_CHCTR3 Reset: 00H Channel Control Register 3 Bit Field 0 LCC 0 RESRSEL Type r rw r rw CEH ADC_CHCTR4 Reset: 00H Channel Control Register 4 Bit Field 0 LCC 0 RESRSEL Type r rw r rw CFH ADC_CHCTR5 Reset: 00H Channel Control Register 5 Bit Field 0 LCC 0 RESRSEL Type r rw r rw D2H ADC_CHCTR6 Reset: 00H Channel Control Register 6 Bit Field 0 LCC 0 RESRSEL Type r rw r rw D3H ADC_CHCTR7 Reset: 00H Channel Control Register 7 Bit Field 0 LCC 0 RESRSEL Type r rw r rw RMAP = 0, PAGE 2 CAH ADC_RESR0L Reset: 00H Result Register 0 Low Bit Field RESULT 0 VF DRC CHNR Type rh r rh rh rh CBH ADC_RESR0H Reset: 00H Result Register 0 High Bit Field RESULT Type rh CCH ADC_RESR1L Reset: 00H Result Register 1 Low Bit Field RESULT 0 VF DRC CHNR Type rh r rh rh rh CDH ADC_RESR1H Reset: 00H Result Register 1 High Bit Field RESULT Type rh CEH ADC_RESR2L Reset: 00H Result Register 2 Low Bit Field RESULT 0 VF DRC CHNR Type rh r rh rh rh CFH ADC_RESR2H Reset: 00H Result Register 2 High Bit Field RESULT Type rh D2H ADC_RESR3L Reset: 00H Result Register 3 Low Bit Field RESULT 0 VF DRC CHNR Type rh r rh rh rh Table 11 ADC Register Overview (cont’d) Addr Register Name Bit 7654 321 0 |
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