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XC888LM Datasheet(PDF) 48 Page - Infineon Technologies AG |
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XC888LM Datasheet(HTML) 48 Page - Infineon Technologies AG |
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48 / 144 page  XC886/888CLM Functional Description Data Sheet 41 V0.9, 2006-12 D3H ADC_RESR3H Reset: 00H Result Register 3 High Bit Field RESULT Type rh RMAP = 0, PAGE 3 CAH ADC_RESRA0L Reset: 00H Result Register 0, View A Low Bit Field RESULT VF DRC CHNR Type rh rh rh rh CBH ADC_RESRA0H Reset: 00H Result Register 0, View A High Bit Field RESULT Type rh CCH ADC_RESRA1L Reset: 00H Result Register 1, View A Low Bit Field RESULT VF DRC CHNR Type rh rh rh rh CDH ADC_RESRA1H Reset: 00H Result Register 1, View A High Bit Field RESULT Type rh CEH ADC_RESRA2L Reset: 00H Result Register 2, View A Low Bit Field RESULT VF DRC CHNR Type rh rh rh rh CFH ADC_RESRA2H Reset: 00H Result Register 2, View A High Bit Field RESULT Type rh D2H ADC_RESRA3L Reset: 00H Result Register 3, View A Low Bit Field RESULT VF DRC CHNR Type rh rh rh rh D3H ADC_RESRA3H Reset: 00H Result Register 3, View A High Bit Field RESULT Type rh RMAP = 0, PAGE 4 CAH ADC_RCR0 Reset: 00H Result Control Register 0 Bit Field VFCT R WFR 0 IEN 0 DRCT R Type rw rw r rw r rw CBH ADC_RCR1 Reset: 00H Result Control Register 1 Bit Field VFCT R WFR 0 IEN 0 DRCT R Type rw rw r rw r rw CCH ADC_RCR2 Reset: 00H Result Control Register 2 Bit Field VFCT R WFR 0 IEN 0 DRCT R Type rw rw r rw r rw CDH ADC_RCR3 Reset: 00H Result Control Register 3 Bit Field VFCT R WFR 0 IEN 0 DRCT R Type rw rw r rw r rw CEH ADC_VFCR Reset: 00H Valid Flag Clear Register Bit Field 0 VFC3 VFC2 VFC1 VFC0 Type r w w w w RMAP = 0, PAGE 5 CAH ADC_CHINFR Reset: 00H Channel Interrupt Flag Register Bit Field CHINF 7 CHINF 6 CHINF 5 CHINF 4 CHINF 3 CHINF 2 CHINF 1 CHINF 0 Type rh rh rh rh rh rh rh rh CBH ADC_CHINCR Reset: 00H Channel Interrupt Clear Register Bit Field CHINC 7 CHINC 6 CHINC 5 CHINC 4 CHINC 3 CHINC 2 CHINC 1 CHINC 0 Type www www ww Table 11 ADC Register Overview (cont’d) Addr Register Name Bit 7654 321 0 |
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