 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
XC888LM Datasheet(PDF) 77 Page - Infineon Technologies AG |
|
|
|||||||||||||||||||||||||||||
XC888LM Datasheet(HTML) 77 Page - Infineon Technologies AG |
|
|
77 / 144 page  XC886/888CLM Functional Description Data Sheet 70 V0.9, 2006-12 Figure 23 V DDP, VDDC and VRESET during Power-on Reset The second type of reset in XC886/888 is the hardware reset. This reset function can be used during normal operation or when the chip is in power-down mode. A reset input pin RESET is provided for the hardware reset. The Watchdog Timer (WDT) module is also capable of resetting the device if it detects a malfunction in the system. Another type of reset that needs to be detected is a reset while the device is in power-down mode (wake-up reset). While the contents of the static RAM are undefined after a power-on reset, they are well defined after a wake-up reset from power-down mode. V DDP RESET with capacitor 2.3V V DDC < 0.4V 0.9*V DDC 0V 5V 5V 2.5V Voltage Voltage Time Time typ. < 50 µs |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
