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XC888LM Datasheet(PDF) 59 Page - Infineon Technologies AG |
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XC888LM Datasheet(HTML) 59 Page - Infineon Technologies AG |
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59 / 144 page ![]() XC886/888CLM Functional Description Data Sheet 52 V0.9, 2006-12 3.3 Flash Memory The Flash memory provides an embedded user-programmable non-volatile memory, allowing fast and reliable storage of user code and data. It is operated from a single 2.5 V supply from the Embedded Voltage Regulator (EVR) and does not require additional programming or erasing voltage. The sectorization of the Flash memory allows each sector to be erased independently. Features • In-System Programming (ISP) via UART • In-Application Programming (IAP) • Error Correction Code (ECC) for dynamic correction of single-bit errors • Background program and erase operations for CPU load minimization • Support for aborting erase operation • Minimum program width 1) of 32-byte for D-Flash and 64-byte for P-Flash • 1-sector minimum erase width • 1-byte read access • Operating supply voltage: 2.5 V ± 7.5 % • Read access time: 3 × t CCLK = 125 ns 2) • Program time: 248256 / f SYS = 2.6 ms 3) • Erase time: 9807360 / f SYS = 102 ms 3) 1) P-Flash: 64-byte wordline can only be programmed once, i.e., one gate disturb allowed. D-Flash: 32-byte wordline can be programmed twice, i.e., two gate disturbs allowed. 2) Values shown here are typical values. f sys =96MHz ±7.5% (fCCLK = 24 MHz ± 7.5 %) is the maximum frequency range for Flash read access. 3) Values shown here are typical values. f sys = 96 MHz ± 7.5% is the only frequency range for Flash programming and erasing. f sysmin is used for obtaining the worst case timing. |
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