XC888LM datasheet(36/144 Pages) INFINEON

36 / 144 page

XC886/888CLM

Functional Description

Data Sheet

V0.9, 2006-12

3.2.3

Bit Protection Scheme

The bit protection scheme prevents direct software writing of selected bits (i.e., protected

bits) using the PASSWD register. When the bit field MODE is 11

B, writing 10011B to the

bit field PASS opens access to writing of all protected bits, and writing 10101

B to the bit

field PASS closes access to writing of all protected bits. Note that access is opened for

maximum 32 CCLKs if the “close access” password is not written. If “open access”

password is written again before the end of 32 CCLK cycles, there will be a recount of

32 CCLK cycles. The protected bits include the N- and K-Divider bits, NDIV and KDIV;

the Watchdog Timer enable bit, WDTEN; and the power-down and slow-down enable

bits, PD and SD.

[7:6]

Operation

Manual page mode. The value of STNR is

ignored and PAGE is directly written.

New page programming with automatic page

saving. The value written to the bit positions of

PAGE is stored. In parallel, the previous

contents of PAGE are saved in the storage bit

field STx indicated by STNR.

Automatic restore page action. The value

written to the bit positions PAGE is ignored

and instead, PAGE is overwritten by the

contents of the storage bit field STx indicated

by STNR.

Reserved

Returns 0 if read; should be written with 0.

Field

Bits

Type Description

XC888LM Datasheet(PDF) 36 Page - Infineon Technologies AG