LDLL16ENTR datasheet(33/102 Pages) STMICROELECTRONICS

33 / 102 page

Figure 21. CAN FD light compatible communication and protocol controller

Diagnosis Data

Communication Controller

Command Data

CAN Bus

Transceiver

Oscillator

(Voltage, process &

temperature compensated,

trimmed)

Protocol Controller

Bit Decoding (Sampling)

Receiver

Error Detection

Destuffing

CRC verification

ACK Generation

Wake-Up Pattern

detection

Receive Data

Transmit Data

TX Pin

RX Pin

External Transceiver Device

Implemented Device Function

ACK

Transmitter

Frame Error Check

(Tx == Rx?

ACK?) è Abort

Frame Preparation

CRC insertion

Bit Stuffing

5.4

Data link layer

The LDLL16EN supports data exchange at a bit rate of 1Mb/s.

The communication is checked for safety reasons: a CRC value is sent with each data frame, supporting ASIL B

requirements.

After every frame all recipients send an acknowledge bit so at least one is received by the sender so it can detect

if it is still connected to the network.

Since all participants of the network are connected to the same wire, a transmitter is able to detect if it is not

correctly operating, consequently entering passive state not to disturb the bus communication.

The data sampling clock is generated in each receiver individually, therefore a minimum edge density of the data

stream is guaranteed such that at least every 10th bit a recessive to dominant edge is present so a

synchronization of the receiver to the data stream is possible.

Also a wake up over the network is implemented.

5.4.1

CAN FD light compatible frame format

The CAN FD base format is used for the CAN FD light compatible protocol without extended ID implemented as

shown in the Figure 22.

Figure 22. CAN FD Base Frame Format (FBFF)

IFS

SOF

Std ID (11 Bit)

FDF

IDE

res

DLC<3:0>

Data Field (max. 64 Bytes)

CRC <16:0> / <20:0>

CRC

Delimiter

ACK

Slot

ACK

Delimiter

EOF <6:0>

RRS

BRS

ESI

IFS

FD Base Frame

Format Light

Arbitration

Field

Data Field

Control Field

CRC Field

ACK Field

EOF

Stuff Bit Count

<2:0>

Parity

FBFF Light

The bits in the control field are fixed: FD frame (FDF) is always recessive. Not supported are extended ID (EID,

IDE bit always dominant), bit rate switch (BRS, always dominant) and error state indication (ESI, always

dominant).

LDLL16EN

Communication interface

DS14111 - Rev 5

page 33/102

LDLL16ENTR Datasheet(PDF) 33 Page - STMicroelectronics

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