LDLL16ENTR datasheet(21/102 Pages) STMICROELECTRONICS

21 / 102 page

After tDIAG_BLANK_GROUP_X elapses, a failure counter starts, and any channel fault is validated after N_Fails

number of detected failures (also non-consecutive). The N_Fails readings are kept in memory up to N_Fails_reset

(number of consecutive NOT failures detection), then the counter will be reset.

Diagnostic validation strategy is applied to any possible load fault: LED shortage, output channel short to VPREG,

open-load. If the on-time of any channel is shorter than the configured blanking time, the device automatically

disables fault detection.

4.3.2

Fault reaction mode and fault bus capability

In the LDLL16EN, there is 1 fault pin with "Fault Bus" capability: 1 open drain fault pin (FAULT) is associated with

1 direct input (DIN), output channels are mapped according to DIN_MAP_CHx.

The fault pin is bidirectional, active low. The fault pins of several devices can be connected all together to have a

common fault bus associated to a particular light function. This allows an automatic deactivation of complete light

function in case of fault on single LED string only, according to the selected fault reaction mode.

There is, in fact, 1 bit per each group (FAULT_REACT_GROUP_X, see the Section 6: FTP and RAM memory

mapping) for fault reaction mode configuration:

Table 8. Fault reaction mode configuration

FAULT_REACT_GROUP_X <0>

Fault reaction mode

Fault on one string => all strings of same group deactivated

Fault on one string => no action on other strings of same group

Figure 13. Device reaction on fault inputs - flow chart

Input Signal

Fault pin = 0?

Yes

FAULT_REACT_

GROUP_X =

No action

Yes

Input Signal

Fault pin = 1

Yes

No action

GROUP 1

Turn off OUTx of

(DIN_MAP_CHx= 1)

LDLL16EN

Functional description

DS14111 - Rev 5

page 21/102

LDLL16ENTR Datasheet(PDF) 21 Page - STMicroelectronics