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LDLL16ENTR Datasheet(PDF) 77 Page - STMicroelectronics |
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LDLL16ENTR Datasheet(HTML) 77 Page - STMicroelectronics |
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77 / 102 page ![]() 6.1.19 FTP status 1 FTP status register #1 Address 2Fh Access Burst read from 2Ch/Read Data Byte 3 Data Byte 2 Data Byte 1 Data Byte 0 bit 31 bit 30 bit 29 bit 28 bit 27 bit 26 bit 25 bit 24 bit 23 bit 22 bit 21 bit 20 bit 19 bit 18 bit 17 bit 16 bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 - - - Table 49. FTP status #1 field description Bit Name Default Description 31-23 - - Not used 22 STB_CONF 0 Device STB pin configuration, for flexiblw usage of the external transceiver: 0: transceiver normal mode with STB pin Low 1: transceiver normal mode with STB pin High 21-20 POR_DELAY 00 Power on reset delay time (tPOR_DELAY); delay time before activating outputs in fail-safe/ stand-alone mode after POR 00: 0 ms 01: 25 ms 10: 50 ms 11: 100 ms 19-18 WD_CONF 00 Watchdog timeout period t_WD 00: 50 ms 01: 100 ms 10: 200 ms 11: 25 ms 17 - 0h Not used 16 PWM_FS_ALL_EN 0 Enable bit of internal PWM dimming in fail-safe/stand-alone mode for group 1 - channels mapped on DIN: 0: internal PWM dimming disabled 1: internal PWM dimming enabled (PWM_DUTY_ALL FTP value with PWM_FREQ FTP Value) 15-0 - 00h Not used LDLL16EN FTP and RAM memory mapping DS14111 - Rev 5 page 77/102 |
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