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LDLL16ENTR Datasheet(PDF) 87 Page - STMicroelectronics |
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LDLL16ENTR Datasheet(HTML) 87 Page - STMicroelectronics |
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87 / 102 page  Symbol Parameter Test conditions Min. Typ. Max. Unit N_Fails_reset Number of NOT detected failures (consecutive) - counter reset 3 1. Upon the usage of the suggested resistance on RDAC pin. 2. Minimum voltage drop from device OUTx to device GND to guarantee programmed current regulation. 3. Any VPREG value from 00h to 32h codes is clamped to 4 V. Table 63. PWM characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit PWM_FREQ_MIN PWM minimum frequency 200 Hz PWM_FREQ_MAX PWM maximum frequency 1400 Hz PWM_FREQ_ACC PWM frequency accuracy -5 5 % PWM_PHASE_SHIFT_MIN PWM minimum phase shift - consumer mode 0 µs PWM_PHASE_SHIFT_MAX PWM maximum phase shift - consumer mode 105 µs PWM_PHASE_SHIFT_STEP PWM phase shift step - consumer mode 15 µs tPWM_ON_OFF Minimum PWM on-time and off-time vs frequency PWM_FREQ = 200 Hz 5 µs PWM_FREQ = 300 Hz 3.3 µs PWM_FREQ ≥400 Hz 2.5 µs tSTARTUP_PWM_VS Start-up time for light function availability - PWM dimming through power line Device in fail-safe DIN_MAP_CHx = 01 (all outputs mapped to direct input) DIN connected to power supply = 12.5 V through resistor divider CURR_SET_GROUP_X = TBD (all outputs current set to TBD mA) Power supply dimming frequency = 200 Hz power supply dimming duty cycle = 50% 700 µs Table 64. NTC derating start configuration - voltage vs temperature Bit 2 Bit 1 Bit 0 Derating start temp. [°C] VNTC_TH [V] 0 0 0 55 2.034 0 0 1 60 1.908 0 1 0 65 1.783 0 1 1 70 1.66 1 0 0 80 1.423 1 0 1 90 1.207 1 1 0 95 1.106 1 1 1 100 1.013 LDLL16EN Electrical characteristics DS14111 - Rev 5 page 87/102 |
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