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LDLL16ENTR Datasheet(PDF) 76 Page - STMicroelectronics |
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LDLL16ENTR Datasheet(HTML) 76 Page - STMicroelectronics |
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76 / 102 page ![]() Bit Name Default Description 1: open-load present on an active channel 6 OR_SHT 0 OR combination of all channels´ short circuit status flags: 0: no short circuit is present on any active channel 1: short circuit present on an active channel 5 OR_OUT_STATUS 0 OR combination of all channels´ output status flags: 0: all output gate drivers are inactive 1: at least one output gate driver is active 4 OR_OUT_SHT_VPREG 0 OR combination of all channels´ output short to VPREG status flags: 0: no short circuit to VPREG is present on any active channel 1: short circuit to VPREG is present on any active channel 3 TW 0 Thermal warning status bit: 0: TJ < TTW – TTW_HYST, thermal warning not active, TJ derating not active 1: TJ > TTW, thermal warning active, TJ derating active 2 TSD 0 Thermal shutdown status bit: 0: TJ < TTSD - TTSD_HYST, thermal shutdown not active, device not in autorestart thermal cycling 1: TJ > TTSD - TTSD_HYST, thermal shutdown active, device in autorestart thermal cycling 1 - 0 Not used 0 PG_NOT_VPREG 1 Power good not threshold status bit VPREG: 1: VPREG < VPG_TH_VPREG, Power good threshold not reached on VPREG 0: VPREG > VPG_TH_VPREG, Power good threshold reached on VPREG LDLL16EN FTP and RAM memory mapping DS14111 - Rev 5 page 76/102 |
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