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LDLL16ENTR Datasheet(PDF) 80 Page - STMicroelectronics |
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LDLL16ENTR Datasheet(HTML) 80 Page - STMicroelectronics |
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80 / 102 page  Bit Name Default Description 95-80 DIN_MAP_CH <15-8> 0 - 79-72 FS_OUT<15-8>_EN 0 - 71-64 Free configurable - - 63-0 CUR_SET_CH<15-8> 0 - 6.2.5 Device FTP configuration - Row 11 Address 0xBh Access R Table 54. Row 11 Bit Name Default Description 127-120 Reserved - - 119-0 ENCRYPTED TRACEABILITY CODE - 120 bits 0 Traceability Code - Read Only 6.2.6 Device FTP configuration - Row 12 Address 0xCh Access R/W Table 55. Row 12 Bit Name Default Description 127-120 Free configurable - - 119-117 DITHERING 0 - 116-112 CAN BIT SAMPLING POINT 0 - 111-104 Free configurable - - 103-96 PG_TH_VPREG 0 - 95-93 Free configurable - - 92 SYNC_IO_PC 0 - 91-90 POR_DELAY 0 - 89 Free configurable - - 88 SHT_DET_EN 0 - 87-86 WD_CONF 0 - 85-84 Free configurable - - 83 STB_CONF - - 82-80 VNTC_TH 0 - 79-72 Free configurable - - 71-69 PWM_FREQ 0 - 68 OL_EN 0 - 67-66 Free configurable - - 65 FAULT_REACT_GROUP_1 0 - LDLL16EN FTP and RAM memory mapping DS14111 - Rev 5 page 80/102 |
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