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LDLL16ENTR Datasheet(PDF) 79 Page - STMicroelectronics |
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LDLL16ENTR Datasheet(HTML) 79 Page - STMicroelectronics |
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79 / 102 page ![]() 6.2 FTP row description 6.2.1 Device FTP configuration - Row 0 Address 0x0h Access R/W Table 51. Row 0 Bit Name Default Description 127-29 Free configurable(1) - - 28 Lock_Row_12 0 0: Row_12 unlocked (R/W access) 1: Row_12 locked (R only access) 27-19 Free configurable(1) 18-16 Lock_Row_2 to Lock_Row_0 0 0: Row_x unlocked (R/W access) 1: Row_x locked (R only access) 15-10 Free configurable(1) 9 Lock_Responder ID 0 0: Responder ID unlocked (R/W access) 1: Responder ID locked (R only access) 8-0 Responder ID 0 1. To pay attention not to write in the adjacent dedicated Lock bit positions. 6.2.2 Device FTP configuration - Row 1 Address 0x1h Access R/W Table 52. Row 1 Bit Name Default Description 127-108 Free configurable - - 107-104 SHT_THR_GROUP_1 0 - 103-100 Free configurable - - 99-96 SHT_THR_GROUP_0 0 - 95-80 DIN_MAP_CH <7-0> 0 - 79-72 FS_OUT<7-0>_EN 0 - 71-64 Free configurable - - 63-0 CUR_SET_CH<7-0> 0 - 6.2.3 Device FTP configuration - Row 2 Address 0x2h Access R/W Table 53. Row 2 Bit Name Default Description 127-96 Free configurable - - LDLL16EN FTP and RAM memory mapping DS14111 - Rev 5 page 79/102 |
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