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LDLL16ENTR Datasheet(PDF) 74 Page - STMicroelectronics |
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LDLL16ENTR Datasheet(HTML) 74 Page - STMicroelectronics |
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74 / 102 page ![]() Table 46. Device status #1 field description Bit Name Default Description 31-24 TJ 0h 8-bit value of junction temperature in 1/256 steps 6Bh: 175 °C 82h: 140 °C A6h: 85°C CCh:25 °C F7h: -40 °C 23-16 - 00h Not used 15-8 VPREG 00h 8-bit voltage of VPREG in 1/256 steps 00h: 0 mV 01h: 78.4 mV 7Fh: 9.96 V FFh: 20 V 7-0 VS 00h 8-bit voltage of VS in 1/256 steps 00h: 0 mV 01h: 157 mV 7Fh: 19.9 V FFh: 40 V 6.1.17 Device status 2 Device status register #2 Address 2Dh Access Burst read from 2Ch/Read Data Byte 3 Data Byte 2 Data Byte 1 Data Byte 0 bit 31 bit 30 bit 29 bit 28 bit 27 bit 26 bit 25 bit 24 bit 23 bit 22 bit 21 bit 20 bit 19 bit 18 bit 17 bit 16 bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 NTC_ADC - - - Table 47. Device status #2 field description Bit Name Default Description 31-24 NTC_ADC 00h 8-bit voltage of NTC in 1/256 steps 00h: 0 mV 01h: 10 mV 7Fh: 1.25 V FFh: 2.50 V 23-0 - 00h Not used LDLL16EN FTP and RAM memory mapping DS14111 - Rev 5 page 74/102 |
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