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LDLL16ENTR Datasheet(PDF) 47 Page - STMicroelectronics |
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LDLL16ENTR Datasheet(HTML) 47 Page - STMicroelectronics |
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47 / 102 page ![]() OpCode: FTP Read = Ah, FTP Write = Bh Besides FTP memory, the device is also equipped with a RAM memory type. Here below the memory mapping is reported. Table 18. RAM memory map Address Name Access Content Configuration and control 00h Reserved 01h PWM_DUTY_ALL Read/Write Linear 8 bit global PWM duty cycle 02h PWM_DUTY_CH0_3 Read/Write/Broadcast write Exponential 8 bit individual PWM duty cycle channel 0-3 03h PWM_DUTY_CH4_7 Read/Write/Broadcast write Exponential 8 bit individual PWM duty cycle channel 4-7 04h PWM_DUTY_CH8_11 Read/Write/Broadcast write Exponential 8 bit individual PWM duty cycle channel 8-11 05h PWM_DUTY_CH12_15 Read/Write/Broadcast write Exponential 8 bit individual PWM duty cycle channel 12-15 06h Reserved 07h Reserved 08h Reserved 09h Reserved 0Ah CUR_SET_CH0_3 Read/Write/Broadcast write 8 bit analog current setting channel 0-3 0Bh CUR_SET_CH4_7 Read/Write/Broadcast write 8 bit analog current setting channel 4-7 0Ch CUR_SET_CH8_11 Read/Write/Broadcast write 8 bit analog current setting channel 8-11 0Dh CUR_SET_CH12_15 Read/Write/Broadcast write 8 bit analog current setting channel 12-15 0Eh Reserved 0Fh Reserved 10h Reserved 11h Reserved 12h DIN_MAP_CH0_15 Read/Write Direct input mapping channel 0-15 13h Reserved 14h Reserved 15h CONFIG_1 Read/Write Device configuration register 1 16h CONFIG_2 Read/Write Device configuration register 2 17h CONFIG_3 Read/Write Device configuration register 3 18h CONFIG_4 Read/Write Device configuration register 4 19h WD_TRIG Read/Write Watchdog trigger Status 1Ah Chain_IDPOS Read ChainID and position number responder ID0 1Bh Reserved 1Ch Reserved 1Dh Reserved 1Eh CAN_FTP Read Bit indicating FTP programming mode status LDLL16EN FTP and RAM memory mapping DS14111 - Rev 5 page 47/102 |
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