HD6417618 datasheet(432/646 Pages) RENESAS

Part #	HD6417618

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series

PDF	646 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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Section 15 Host Interface (HIF)

Rev. 6.00 Jun. 12, 2007 Page 400 of 610

REJ09B0131-0600

Bit

Bit Name

Initial

Value

R/W

Description

—

Reserved

This bit is always read as 0. The write value should

always be 0.

—

Reserved

This bit is always read as 1. The write value should

always be 1.

MD1

0/1

HIF Mode 1

Indicates whether this LSI was started up in HIF boot

mode or non-HIF boot mode. This bit stores the value

of the HIFMD pin sampled at a power-on reset

0: Started up in non-HIF boot mode (booted from the

memory connected to area 0)

1: Started up in HIF boot mode (booted from HIFRAM)

4 to 2

—

All 0

Reserved

These bits are always read as 0. The write value

should always be 0.

EDN

R/W

Endian for HIFRAM Access

Specifies the byte order when HIFRAM is accessed by

the on-chip CPU.

0: Big endian (MSB first)

1: Little endian (LSB first)

R/W

Byte Order for Access of All HIF Registers Including

HIFDATA

Specifies the byte order when an external device

accesses all HIF registers including HIFDATA.

0: Big endian (MSB first)

1: Little endian (LSB first)

HD6417618 Datasheet(PDF) 432 Page - Renesas Technology Corp

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