HD6417618 datasheet(44/646 Pages) RENESAS

44 / 646 page

Section 1 Overview

Rev. 6.00 Jun. 12, 2007 Page 12 of 610

REJ09B0131-0600

Classifi-

cation

Abbr.

I/O

Pin Name

Description

TCK

Input

Test Clock

Test clock input pin

TMS

Input

Test Mode

Select

Input pin for test mode select signal

User

debugging

interface

(H-UDI)

TDI

Input

Test Data

Input

Serial input pin for an instruction and data

TDO

Output Test Data

Output

Serial output pin for an instruction and data

TRST

Input

Test Reset

Input pin for initialization

I/O port

PA25 to

PA16

Input/

output

General port

Pins for 10-bit general input/output port

PB13 to

PB00

Input/

output

General port

Pins for 14-bit general input/output port

PC20 to

PC00

Input/

output

General port

Pins for 21-bit general input/output port

PD07 to

PD00

Input/

output

General port

Pins for 8-bit general input/output port

PE24 to

PE00

Input/

output

General port

Pins for 25-bit general input/output port

Emulator

interface

ASEMD

Input

ASE Mode

Specifies ASE mode.

This LSI enters ASE mode when this signal goes low and

normal mode when this pin goes high. In ASE mode,

functions for the emulator are available.

Test Mode

TESTMD

Input

Test Mode

Specifies test mode.

This LSI enters test mode when this signal goes low. Fix this

signal high.

TESTOUT

Output Test Output

Output pin for testing. This pin should be open.

Note:

Magic Packet

TM is the trademark of Advanced Micro Devices, Inc.

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