HD6417618 datasheet(19/646 Pages) RENESAS

19 / 646 page

Rev. 6.00 Jun. 12, 2007 Page xix of xxxii

18.2.10 Execution Times Break Register (BETR)............................................................. 482

18.2.11 Branch Source Register (BRSR)........................................................................... 482

18.2.12 Branch Destination Register (BRDR)................................................................... 483

18.3

Operation ........................................................................................................................... 484

18.3.1 Flow of User Break Operation .............................................................................. 484

18.3.2 Break on Instruction Fetch Cycle.......................................................................... 485

18.3.3 Break on Data Access Cycle................................................................................. 485

18.3.4 Sequential Break ................................................................................................... 486

18.3.5 Value of Saved Program Counter (PC)................................................................. 486

18.3.6 PC Trace ............................................................................................................... 487

18.3.7 Usage Examples.................................................................................................... 488

18.3.8 Usage Notes .......................................................................................................... 492

Section 19 User Debugging Interface (H-UDI) ...................................................493

19.1

Features.............................................................................................................................. 493

19.2

Input/Output Pins ...............................................................................................................495

19.3

Register Descriptions ......................................................................................................... 496

19.3.1 Bypass Register (SDBPR) .................................................................................... 496

19.3.2 Instruction Register (SDIR) .................................................................................. 496

19.3.3 Boundary Scan Register (SDBSR) ....................................................................... 497

19.3.4 ID Register (SDID) ............................................................................................... 503

19.4

Operation ........................................................................................................................... 504

19.4.1 TAP Controller ..................................................................................................... 504

19.4.2 Reset Configuration .............................................................................................. 505

19.4.3 TDO Output Timing ............................................................................................. 505

19.4.4 H-UDI Reset ......................................................................................................... 506

19.4.5 H-UDI Interrupt .................................................................................................... 506

19.5

Boundary Scan ...................................................................................................................507

19.5.1 Supported Instructions .......................................................................................... 507

19.5.2 Points for Attention............................................................................................... 508

19.6

Usage Notes ....................................................................................................................... 508

Section 20 List of Registers .................................................................................509

20.1

Register Addresses (Address Order) .................................................................................. 510

20.2

Register Bits....................................................................................................................... 516

20.3

Section 21 Electrical Characteristics ...................................................................539

21.1

Absolute Maximum Ratings .............................................................................................. 539

21.2

Power-On and Power-Off Order ........................................................................................ 540

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