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HD6417618 Datasheet(PDF) 10 Page - Renesas Technology Corp |
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HD6417618 Datasheet(HTML) 10 Page - Renesas Technology Corp |
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10 / 646 page ![]() Rev. 6.00 Jun. 12, 2007 Page x of xxxii Contents Section 1 Overview ................................................................................................. 1 1.1 Features.................................................................................................................................. 2 1.2 Block Diagram....................................................................................................................... 6 1.3 Pin Assignments .................................................................................................................... 7 1.4 Pin Functions ......................................................................................................................... 8 Section 2 CPU ....................................................................................................... 19 2.1 Features................................................................................................................................ 19 2.2 Register Configuration......................................................................................................... 19 2.2.1 General Registers (Rn)............................................................................................ 21 2.2.2 Control Registers .................................................................................................... 21 2.2.3 System Registers..................................................................................................... 22 2.2.4 Initial Values of Registers....................................................................................... 23 2.3 Data Formats........................................................................................................................ 24 2.3.1 Register Data Format .............................................................................................. 24 2.3.2 Memory Data Formats ............................................................................................ 24 2.3.3 Immediate Data Formats......................................................................................... 25 2.4 Features of Instructions........................................................................................................25 2.4.1 RISC Type .............................................................................................................. 25 2.4.2 Addressing Modes .................................................................................................. 28 2.4.3 Instruction Formats ................................................................................................. 31 2.5 Instruction Set ...................................................................................................................... 35 2.5.1 Instruction Set by Type........................................................................................... 35 2.6 Processing States.................................................................................................................. 47 2.6.1 State Transition....................................................................................................... 47 Section 3 Cache ..................................................................................................... 49 3.1 Features................................................................................................................................ 49 3.1.1 Cache Structure....................................................................................................... 49 3.1.2 Divided Areas and Cache ....................................................................................... 51 3.2 Register Descriptions ...........................................................................................................52 3.2.1 Cache Control Register 1 (CCR1) .......................................................................... 52 3.2.2 Cache Control Register 3 (CCR3) .......................................................................... 53 3.3 Operation ............................................................................................................................. 54 3.3.1 Searching Cache ..................................................................................................... 54 3.3.2 Read Access............................................................................................................ 56 |
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