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HD6417618 Datasheet(PDF) 66 Page - Renesas Technology Corp

Part # HD6417618
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
PDF  646 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6417618 Datasheet(HTML) 66 Page - Renesas Technology Corp

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Section 2 CPU
Rev. 6.00 Jun. 12, 2007 Page 34 of 610
REJ09B0131-0600
Instruction Format
Source Operand
Destination
Operand
Sample Instruction
dddddddd
: GBR
indirect with
displacement
R0 (register direct) MOV.L
@(disp,GBR),R0
R0 (register direct) dddddddd: GBR
indirect with
displacement
MOV.L
R0,@(disp,GBR)
dddddddd
:
PC relative with
displacement
R0 (register direct) MOVA @(disp,PC),R0
d type
xxxx xxxx dddd dddd
15
0
dddddddd
:
PC relative
BF label
d12 type
xxxx dddd dddd dddd
15
0
dddddddddddd
:
PC relative
BRA label
(label=disp+PC)
nd8 type
xxxx nnnn dddd dddd
15
0
dddddddd
: PC
relative with
displacement
nnnn
: register
direct
MOV.L @(disp,PC),Rn
iiiiiiii
:
immediate
Index GBR indirect AND.B
#imm,@(R0,GBR)
iiiiiiii
:
immediate
R0 (register direct) AND #imm,R0
i type
xxxx xxxx iiii iiii
15
0
iiiiiiii
:
immediate
TRAPA #imm
ni type
xxxx nnnn iiii iiii
15
0
iiiiiiii
:
immediate
nnnn
: register
direct
ADD #imm,Rn
Note:
*
In multiply and accumulate instructions, nnnn is the source register.



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