HD6417618 datasheet(42/646 Pages) RENESAS

42 / 646 page

Section 1 Overview

Rev. 6.00 Jun. 12, 2007 Page 10 of 610

REJ09B0131-0600

Classifi-

cation

Abbr.

I/O

Pin Name

Description

Bus

control

CE1B

Output PCMCIA Card

Select Lower

Side

Chip enable for PCMCIA allocated to area 6

CE2A

Output PCMCIA Card

Select Upper

Side

Chip enable for PCMCIA allocated to area 5

CE2B

Output PCMCIA Card

Select Upper

Side

Chip enable for PCMCIA allocated to area 6

ICIOWR

Output PCMCIA I/O

Write Strobe

Connects to the PCMCIA I/O write strobe pin.

ICIORD

Output PCMCIA I/O

Read Strobe

Connects to the PCMCIA I/O read strobe pin.

Output PCMCIA

Memory Write

Strobe

Connects to the PCMCIA memory write strobe.

IOIS16

Input

PCMCIA

Dynamic Bus

Sizing

In little endian mode, this signal indicates 16-bit bus width of

PCMCIA. In big endian mode, fix this pin low.

CRS

Input

Carrier Sense

Carrier sense pin

Ethernet

controller

COL

Input

Collision

Collision detect pin

MII_TXD3 to

MII_TXD0

Output Transmit Data 4-bit transmit data pins

TX_EN

Output Transmit

Enable

Indicates that transmit data is on pins MII_TXD3 to

MII_TXD0.

TX_CLK

Input

Transmit

Clock

Timing reference input for the TX_EN, TX_ER, and

MII_TXD3 to MII_TXD0 pins

TX_ER

Output Transmit Error Informs PHY LSI of an error during transmission.

MII_RXD3 to

MII_RXD0

Input

Receive Data

4-bit receive data pins

RX_DV

Input

Receive Data

Valid

Indicates that valid receive data is on pins MII_RXD3 to

MII_RXD0.

RX_CLK

Input

Receive Clock Timing reference input for the RX_DV, RX_ER, and

MII_RXD3 to MII_RXD0 pins

RX_ER

Input

Receive Error

Pin for detection of an error during reception

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