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HD6417618 Datasheet(PDF) 429 Page - Renesas Technology Corp |
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HD6417618 Datasheet(HTML) 429 Page - Renesas Technology Corp |
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429 / 646 page ![]() Section 15 Host Interface (HIF) Rev. 6.00 Jun. 12, 2007 Page 397 of 610 REJ09B0131-0600 Bit Bit Name Initial Value R/W Description 1 0 BYTE1 BYTE0 0 0 R/W* R/W* Internal Register Byte Specification These bits specify in advance the target word location before the external device accesses a register among HIFGSR, HIFSCR, HIFMCR, HIFIICR, HIFEICR, HIFADR, HIFDATA, and HIFBCR. • When HIFSCR.BO = 0 00: Bits 31 to 16 in register 01: Setting prohibited 10: Bits 15 to 0 in register 11: Setting prohibited • When HIFSCR.BO = 1 00: Bits 15 to 0 in register 01: Setting prohibited 10: Bits 31 to 16 in register 11: Setting prohibited However, when HIFDATA is selected using bits REG5 to REG0, each time reading or writing of HIFDATA occurs, these bits change according to the following rule. 00 → 10 → 00 → 10... repeated Note: * This bit can be only written to by an external device while the HIFRS pin is held high. It cannot be written to by the on-chip CPU. |
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