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HD6417618 Datasheet(PDF) 272 Page - Renesas Technology Corp |
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HD6417618 Datasheet(HTML) 272 Page - Renesas Technology Corp |
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272 / 646 page ![]() Section 11 Ethernet Controller (EtherC) Rev. 6.00 Jun. 12, 2007 Page 240 of 610 REJ09B0131-0600 11.3.7 Receive Frame Length Register (RFLR) RFLR is a 32-bit readable/writable register and it specifies the maximum frame length (in bytes) that can be received by this LSI. The settings in this register must not be changed while the receiving function is enabled. Bit Bit Name Initial Value R/W Description 31 to 12 All 0 R Reserved These bits are always read as 0. The write value should always be 0. 11 to 0 RFL11 to RFL0 All 0 R/W Receive Frame Length 11 to 0 The frame length described here refers to all fields from the destination address up to and including the CRC data. Frame contents from the destination address up to and including the data are actually transferred to memory. CRC data is not included in the transfer. When data that exceeds the specified value is received, the part of the data that exceeds the specified value is discarded. H'000 to H'5EE: 1,518 bytes H'5EF: 1,519 bytes H'5F0: 1,520 bytes : : H'7FF: 2,047 bytes H'800 to H'FFF: 2,048 bytes |
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