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HD6417618 Datasheet(PDF) 442 Page - Renesas Technology Corp

Part # HD6417618
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
PDF  646 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6417618 Datasheet(HTML) 442 Page - Renesas Technology Corp

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Section 15 Host Interface (HIF)
Rev. 6.00 Jun. 12, 2007 Page 410 of 610
REJ09B0131-0600
15.6
Interface (Basic)
Figure 15.3 shows the basic read/write sequence. HIF read is defined by the overlap period of the
HIFRD low-level period and HIFCS low-level period, and HIF write is defined by the overlap
period of the
HIFWR low-level period and HIFCS low-level period. The HIFRS signal indicates
whether this is normal access or index/status register access; low level indicates normal access and
high level indicates index/status register access.
HIFCS
HIFRS
Write cycle
Read cycle
HIFRD
HIFWR
HIFD15 to HIFD00
WT_D
RD_D
Figure 15.3 Basic Timing for HIF Interface



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