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34708 Datasheet(PDF) 127 Page - Freescale Semiconductor, Inc

Part # 34708
Description  Power Management Integrated Circuit (PMIC) for i.MX50/53 Families
PDF  159 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

34708 Datasheet(HTML) 127 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
127
Freescale Semiconductor
MC34708
Functional Block Description
Table 118. Register 13, Power Control 0
Name
Bit #
R/W
Reset
Default
Description
PCEN
0
R/W
RTCPORB
0x0
Power cut enable
PCCOUNTEN
1
R/W
RTCPORB
0x0
Power cut counter enable
WARMEN
2
R/W
RTCPORB
0x0
Warm start enable
USEROFFSPI
3
R/W
RESETB
0x0
SPI command for entering user off modes
DRM
4
R/W
RTCPORB (74)
0x0
Keeps VSRTC and CLK32KMCU on for all states
USEROFFCLK
5
R/W
RTCPORB
0x0
Keeps the CLK32KMCU active during user off
CLK32KMCUEN
6
R/W
RTCPORB
0x1
Enables the CLK32KMCU
Unused
8-7
R
0x00
Not available
PCUTEXPB
9
R/W
RTCPORB
0x0
PCUTEXPB=1 at a startup event indicates that PCUT timer
did not expire (assuming it was set to 1 after booting)
Unused
18-10
R
0x000
Not available
Reserved
19
R
NONE
0x0
Reserved
VCOIN[2:0]
22-20
R/W
RTCPORB
0x00
Coin cell charger voltage setting
COINCHEN
23
R/W
RTCPORB
0x0
Coin cell charger enable
Notes:
74.
Reset by RTCPORB but not during a GLBRST (global reset)
Table 119. Register 14, Power Control 1
Name
Bit #
R/W
Reset
Default
Description
PCT[7:0]
7-0
R/W
RTCPORB
0x00
Power cut timer
PCCOUNT[3:0]
11-8
R/W
RTCPORB
0x00
Power cut counter
PCMAXCNT[3:0]
15-12
R/W
RTCPORB
0x00
Maximum allowed number of power cuts
Unused
23-16
R
0x00
Not available
Table 120. Register 15, Power Control 2
Name
Bit #
R/W
Reset
Default
Description
RESTARTEN
0
R/W
RTCPORB
0x0
Enables automatic restart after a system reset
PWRON1RSTEN
1
R/W
RTCPORB
0x0
Enables system reset on PWRON1 pin
PWRON2RSTEN
2
R/W
RTCPORB
0x0
Enables system reset on PWRON2 pin
Unused
3
R
0x0
Not available
PWRON1DBNC[1:0]
5-4
R/W
RTCPORB
0x00
Sets debounce time on PWRON1 pin
PWRON2DBNC[1:0]
7-6
R/W
RTCPORB
0x00
Sets debounce time on PWRON2 pin
GLBRSTTMR[1:0]
9-8
R/W
RTCPORB
0x01
Sets Global reset time
STANDBYINV
10
R/W
RTCPORB
0x0
If set then STANDBY is interpreted as active low
Unused
11
R
0x0
Not available
WDIRESET
12
R/W
RESETB
0x0
Enables system reset through WDI
SPIDRV[1:0]
14-13
R/W
RTCPORB
0x01
SPI drive strength
Unused
16-15
R
0x00
Not available



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