34708 datasheet(65/159 Pages) FREESCALE

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Analog Integrated Circuit Device Data



Freescale Semiconductor

MC34708

Functional Block Description

7.5.6

Linear Regulators (LDOs)

This section describes the linear regulators provided. For convenience, these regulators are named to indicate their typical or

possible applications, but the supplies are not limited to these uses and may be applied to any loads within the specified regulator

capabilities.

A low power standby mode controlled by STANDBY is provided for the regulators with an external pass device in which the bias

current is aggressively reduced. This mode is useful for deep sleep operation, where certain supplies cannot be disabled, but

active regulation can be tolerated with lesser parametric requirements. The output drive capability and performance are limited

in this mode.

All regulators use the main bandgap as reference. The main bandgap is bypassed with a capacitor at REFCORE. The bandgap

and the rest of the core circuitry are supplied from VCORE. The performance of the regulators is directly dependent on the

performance of VCOREDIG and the bandgap. No external DC loading is allowed on VCOREDIG or REFCORE. VCOREDIG is

kept powered as long as there is a valid supply and/or coin cell.

7.5.6.1

General Features

The following applies to all linear regulators, unless otherwise specified.

• Specifications are for an ambient temperature of –40 to 85 °C.

• Advised bypass capacitor is the Murata GRM155R60G225ME95, which comes in a 0402 case.

• In general, parametric performance specifications assume the use of low ESR X5R/X7R ceramic capacitors with 20%

accuracy and 15% temperature spread, for a worst case stack up of 35% from the nominal value. Use of other types with wider

temperature variation may require a larger room-temperature nominal capacitance value to meet performance specs over

temperature. In addition, capacitor derating as a function of DC bias voltage requires special attention. Finally, minimum

bypass capacitor guidelines are provided for stability and transient performance. Larger values may be applied; performance

metrics may be altered and generally improved, but should be confirmed in system applications.

• Regulators which require a minimum output capacitor ESR (those with external PNPs) can avoid an external resistor if ESR

is assured with capacitor specifications or board level trace resistance.

• The output voltage tolerance specified for each of the linear regulators include process variation, temperature range, static

line regulation, and static load regulation.

• The PSRR of the regulators is measured with the perturbating signal at the input of the regulator. The power management IC

is supplied separately from the input of the regulator and does not contain the perturbated signal. During measurements, care

must be taken not to reach the drop out of the regulator under test.

• In the Low Power mode, the output performance is degraded. Only those parameters listed in the Low Power mode section

are guaranteed. In this mode, the output current is limited to much lower currents than in the active mode.

• Regulator performance is degraded in the extended input voltage range. This means that the supply still behaves as a

regulator, and will try to hold up the output voltage by turning the pass device fully on. As a result, the bias current will increase

and all performance parameters will be heavily degraded, such as PSRR and load regulation.

• Note that the minimum operating range specifications in some cases may be conflicting, due to numerous set point and biasing

options, as well as the potential to run BP into one of the software or hardware shutdown thresholds. The specifications are

general guidelines that should be interpreted with some care in such cases.

• When a regulator gets disabled, the output will be pulled towards ground by an internal pull-down. The pull-down is also

activated when RESETb goes low.

•32 kHz spur levels are specified for fully loaded conditions.

ILEAK-SWBST NMOS Off Leakage

•SWBSTIN = 4.5 V, SWBSTMODE [1:0] = 0

1.0

6.0

µA

Notes:

55.

VIN is the low side of the inductor that is connected to BP.

Table 53. SWBST Electrical Specifications

Characteristics noted under conditions BP = 3.6 V, VBUS = 5.0 V, -40 C  TA  85 C, unless otherwise noted. Typical values

at BP = 3.6 V and TA = 25 °C under nominal conditions, unless otherwise noted.

Symbol

Characteristic

Min

Typ

Max

Unit

Notes

34708 Datasheet(PDF) 65 Page - Freescale Semiconductor, Inc

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