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34708 Datasheet(PDF) 66 Page - Freescale Semiconductor, Inc

Part # 34708
Description  Power Management Integrated Circuit (PMIC) for i.MX50/53 Families
PDF  159 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

34708 Datasheet(HTML) 66 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
Freescale Semiconductor
66
MC34708
Functional Block Description
• Short-circuit Protection (SCP) is included on certain LDOs (see the SCP section later in this section). Exceeding the SCP
threshold will disable the regulator and generate a system interrupt. The output voltage will not sag below the specified voltage
with the rated current being drawn. For the lower current LDOs without SCP, they are less accessible to the user environment
and essentially self-limiting.
• The power tree of a given application must be scrubbed for critical use cases to ensure consistency and robustness in the
power strategy.
7.5.6.2
LDO Regulator Control
The regulators with embedded pass devices (VPLL, VGEN1, and VUSB) have an adaptive biasing scheme thus, there are no
distinct operating modes such as a Normal mode and a Low Power mode. Therefore, no specific control is required to put these
regulators in a Low Power mode.
The external pass regulator (VDAC) can also operate in a normal and low power mode. However, since a load current detection
cannot be performed for this regulator, the transition between both modes is not automatic and is controlled by setting the
corresponding mode bits for the operational behavior desired.
The regulators VUSB2, and VGEN2 can be configured for using the internal pass device or external pass device as explained in
Supplies. For both configurations, the transition between both modes is controlled by setting the VxMODE bit for the specific
regulator. Therefore, depending on the configuration selected, the automatic Low Power mode determines availability.
The regulators can be disabled and the general purpose outputs can be forced low when going into Standby (note that the
Standby response timing can be altered with the STBYDLY function, as described in the previous section). Each regulator has
an associated SPI bit for this. When the bit is not set, STANDBY is of no influence. The actual operating mode of the regulators
as a function of STANDBY is not reflected through SPI. In other words, the SPI will read back what is programmed, not the actual
state.
For regulators with internal pass devices, the previous table can be simplified by elimination of the VxMODE column.
Table 54. LDO Regulator Control (external pass device LDOs)
VxEN
VxMODE
VxSTBY
STANDBY(56)
Regulator Vx
0
X
X
X
Off
1
0
0
X
On
1
1
0
X
Low Power
1
X
1
0
On
1
0
1
1
Off
1
1
1
1
Low Power
Notes
56.
STANDBY refers to a Standby event as described earlier
Table 55. LDO Regulator Control (internal pass device LDOs)
VxEN
VxSTBY
STANDBY (57)
Regulator Vx
0
X
X
Off
1
0
X
On
1
1
0
On
1
1
1
Off
Notes
57.
STANDBY refers to a Standby event as described earlier



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