34708 datasheet(46/159 Pages) FREESCALE

46 / 159 page

Analog Integrated Circuit Device Data



Freescale Semiconductor

MC34708

Functional Block Description

In normal steady state operating mode, the SW1xPWGD pin is high. When the buck charger set point is changed to a higher or

lower set point, the SW1xPWGD pin will go low and will go high again when the higher/lower set point is reached.

7.5.4.2

Switching Frequency

A PLL generates the Switching system clocking from the 32.768 kHz crystal oscillator reference. The switching frequency can

be programmed to 2.0 MHz or 4.0 MHz by setting the PLLX SPI bit as shown in Table 35.

The clocking system provides a near instantaneous activation when the Switching regulators are enabled or when exiting PFM

operation for PWM mode. The PLL can be configured for continuous operation with PLLEN = 1.

7.5.4.3

SW1

SW1 is fully integrated synchronous Buck PWM voltage mode control DC/DC regulator. It can be operated in single phase/dual

phase mode. The operating mode of the Switching regulators is configured by the SW1CFG pin. The SW1CFG pin is sampled

at startup.

Table 35. Buck Regulator Frequency

PLLX

Switching Frequency (Hz)

2 000 000

4 000 000

Table 36. SW1 Configuration

SW1CFG

SW1A/B Configuration Mode

VCOREDIG

Single Phase Mode

Ground

Dual Phase Mode

34708 Datasheet(PDF) 46 Page - Freescale Semiconductor, Inc