34708 datasheet(108/159 Pages) FREESCALE

108 / 159 page

Analog Integrated Circuit Device Data



Freescale Semiconductor

108

MC34708

Functional Block Description

For a SPI write, the first bit sent to the MC34708 must be a one, indicating a SPI write cycle. Next the six bit address is sent MSB

first. This is followed by one dead bit to allow for more address decode time. The data is then sent MSB first. The SPI data is

written to the SPI register whose address was sent at the start of the SPI cycle on the falling edge of the 32nd SPI clock.

Additionally, whenever a SPI write cycle is taking place the SPI read data is shifted out for the same address as for the write

cycle. Next the 6-bit address is written, MSB first. Finally, data bits are written, MSB first. Once all the data bits are written then

the data is transferred into the actual registers on the falling edge of the 32nd CLK.

The CS polarity is active high. The CS line must remain high during the entire SPI transfer. For a write sequence it is possible for

the written data to be corrupted, if after the falling edge of the 32nd clock the CS goes low before it's required time. CS can go

low before this point and the SPI transaction will be ignored, but after that point the write process is started and cannot be

stopped, because the write strobe pulse is already being generated, and CS going low may cause a runt pulse that may or may

not be wide enough to clock all 24 data bits properly. To start a new SPI transfer, the CS line must be toggled low and then pulled

high again. The MISO line will be tri-stated while CS is low.

The register map includes bits that are read/write, read only, read/write “1” to clear (i.e., Interrupts), and clear on read, reserved,

and unused. Refer to the SPI/I2C Register Map and the individual subcircuit descriptions to determine the read/write capability

of each bit. All unused SPI bits in each register must be written to as zeroes. A SPI read back of the address field and unused

bits are returned as zeroes. To read a field of data, the MISO pin will output the data field pointed to by the 6 address bits loaded

at the beginning of the SPI sequence.

Figure 33. SPI Transfer Protocol Single Read/Write Access

Figure 34. SPI Transfer Protocol Multiple Read/Write Access

CLK

MOSI

MISO

Write_En

Address5

Address4

Address3

Address2

Address 1

Address 0

Data 23

Data 1

Data 0

Data 23

Data 1

Data 0

D ata 22

“D ead Bit”

24 Bits Data

Preamble

First Address

Preamble

Another Address

MOSI

MISO

34708 Datasheet(PDF) 108 Page - Freescale Semiconductor, Inc

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