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HD6417618 Datasheet(PDF) 229 Page - Renesas Technology Corp

Part # HD6417618
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
PDF  646 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6417618 Datasheet(HTML) 229 Page - Renesas Technology Corp

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Section 8 Clock Pulse Generator (CPG)
Rev. 6.00 Jun. 12, 2007 Page 197 of 610
REJ09B0131-0600
Mode 1: The frequency of the external clock input from the EXTAL pin is quadrupled by PLL
circuit 2, and then the clock is supplied to this LSI. Since the input clock frequency ranging 10
MHz to 12.5 MHz can be used, the CKIO frequency ranges from 40 MHz to 50 MHz.
Mode 2: The frequency of the on-chip crystal oscillator output is quadrupled by PLL circuit 2, and
then the clock is supplied to this LSI. Since the crystal resonator frequency ranging 10 MHz to
12.5 MHz can be used, the CKIO frequency ranges from 40 MHz to 50 MHz.
Mode 5: The frequency of the external clock from the EXTAL pin is doubled by PLL circuit 2,
and then the clock is supplied to this LSI. Since the input clock frequency ranging 10 MHz to 25
MHz, the CKIO frequency ranges from 20 MHz to 50 MHz.
Mode 6: The frequency of the on-chip crystal oscillator output is doubled by PLL circuit 2, and
then the clock is supplied to the LSI. Since the crystal oscillation frequency ranging 10 MHz to 25
MHz can be used, the CKIO frequency ranges from 20 MHz to 50 MHz.
Table 8.3
Possible Combination of Clock Modes and FRQCR Values
Mode
FRQCR
Register
Value
PLL
Circuit 1
PLL
Circuit 2
Clock Ratio*
(I:B:P)
Input Clock
Frequency Range
CKIO Pin
Frequency
Range
H'1000
ON (
×1)
ON (
×4)
4:4:4
1 or 2
H'1001
ON (
×1)
ON (
×4)
4:4:2
10 MHz to
12.5 MHz
40 MHz to
50 MHz
H'1003
ON (
×1)
ON (
×4)
4:4:1
H'1101
ON (
×2)
ON (
×4)
8:4:4
H'1103
ON (
×2)
ON (
×4)
8:4:2
5 or 6
H'1000
ON (
×1)
ON (
×2)
2:2:2
H'1001
ON (
×1)
ON (
×2)
2:2:1
10 MHz to
25 MHz
20 MHz to
50 MHz
H'1003
ON (
×1)
ON (
×2)
2:2:1/2
H'1101
ON (
×2)
ON (
×2)
4:2:2
H'1103
ON (
×2)
ON (
×2)
4:2:1
Note:
*
Input clock is assumed to be 1.



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