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HD6417618 Datasheet(PDF) 151 Page - Renesas Technology Corp |
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HD6417618 Datasheet(HTML) 151 Page - Renesas Technology Corp |
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151 / 646 page ![]() Section 7 Bus State Controller (BSC) Rev. 6.00 Jun. 12, 2007 Page 119 of 610 REJ09B0131-0600 Bit Bit Name Initial Value R/W Description 10 9 BSZ1 BSZ0 1* 1* R/W R/W Data Bus Size Specify the data bus width of each area. 00: Reserved (setting prohibited) 01: 8 bits 10: 16 bits 11: Reserved (setting prohibited) Notes: 1. The data bus width for area 0 is specified by the external pin. These bits are ignored. 2. When area 5 or 6 is specified as PCMCIA space, the bus width can be specified as either 8 bits or 16 bits. 3. If area 3 is specified as SDRAM space, the bus width must be specified as 16 bits. 4. These bits must be specified to either 01 or 11 before accessing to memory in other than area 0. 8 to 0 All 0 R Reserved These bits are always read as 0. The write value should always be 0. Note: * CS0BCR fetches the external pin state (MD3) that specify the bus width at a power-on reset. |
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