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HD6417618 Datasheet(PDF) 407 Page - Renesas Technology Corp

Part # HD6417618
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
PDF  646 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6417618 Datasheet(HTML) 407 Page - Renesas Technology Corp

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Section 14 Serial Communication Interface with FIFO (SCIF)
Rev. 6.00 Jun. 12, 2007 Page 375 of 610
REJ09B0131-0600
14.4.3
Synchronous Mode
In synchronous mode, the SCIF transmits and receives data in synchronization with clock pulses.
This mode is suitable for high-speed serial communication.
The SCIF transmitter and receiver are independent, so full-duplex communication is possible
while sharing the same clock. The transmitter and receiver are also 16-byte FIFO buffered, so
continuous transmitting or receiving is possible by reading or writing data while transmitting or
receiving is in progress.
Figure 14.11 shows the general format in synchronous serial communication.
Don’t care
Don’t care
One unit of transfer data (character or frame)
Bit 0
Serial data
Synchronization
clock
Bit 1
Bit 3
Bit 4
Bit 5
LSB
MSB
Bit 2
Bit 6
Bit 7
*
*
Note: * High except in continuous transfer
Figure 14.11 Data Format in Synchronous Communication
In synchronous serial communication, each data bit is output on the communication line from one
falling edge of the serial clock to the next. Data is guaranteed valid at the rising edge of the serial
clock. In each character, the serial data bits are transmitted in order from the LSB (first) to the
MSB (last). After output of the MSB, the communication line remains in the state of the MSB. In
synchronous mode, the SCIF transmits data by synchronizing with the falling edge of the serial
clock, and receives data by synchronizing with the rising edge of the serial clock.



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