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HD6417618 Datasheet(PDF) 345 Page - Renesas Technology Corp |
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HD6417618 Datasheet(HTML) 345 Page - Renesas Technology Corp |
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345 / 646 page ![]() Section 12 Ethernet Controller Direct Memory Access Controller (E-DMAC) Rev. 6.00 Jun. 12, 2007 Page 313 of 610 REJ09B0131-0600 Notes: 1. The specified constant period is the timeout period mentioned in section 12.4.1, Usage Notes on SH-Ether EtherC/E-DMAC Status Register (EESR). 2. Set n with reference to the maximum specified time values in table 12.2. : Processing added as the countermeasure for the problem Yes Yes Yes Next transmission task generated? TACT = 0? 1. 2. 3. 4. 5. 5. 4. 6. 7. 8. No No Yes No No Yes No Prepare multiple transmit descriptors. Transmission starts. Transmission task End After setting the transmit descriptor, set the TR bit in EDTRR to 1. Read the TACT bit of the corresponding transmit descriptor. After setting the corresponding transmit descriptor, set the TR bit in EDTRR to 1. Call an OS service routine with a timeout function to place the transmission task in a waiting state. Has the transmission task left the waiting state within he constant specified time? i = 0; Timeout Read the TACT bit of the corresponding transmit descriptor. i < n? TACT = 0? i++; *2 *1 No No Yes Yes Interrupt handler TC interrupt? Interrupt other than TC? Save EESR and clear the bit by writing 1. Generation of EtherC/E-DMAC interrupt End Make an OS service call to bring the transmission task out of the waiting state. Interrupt processing for interrupts other than TC Issue a software reset to initialize the EtherC and E-DMAC modules. Make initial settings of the EtherC and E-DMAC modules. Initialize the transmit/receive descriptors and transmit/receive buffers. Figure 12.13 Countermeasure for the Case with TC Interrupt-Driven Software: Addition of Timeout Processing within the Limit Imposed by the Maximum Specified Time |
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