HD6417618 datasheet(347/646 Pages) RENESAS

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Section 13 Compare Match Timer (CMT)

TIMCMT3A_000020030900

Rev. 6.00 Jun. 12, 2007 Page 315 of 610

REJ09B0131-0600

Section 13 Compare Match Timer (CMT)

This LSI has an on-chip compare match timer (CMT) consisting of a 2-channel 16-bit timer. The

CMT has a16-bit counter, and can generate interrupts at set intervals.

13.1

Features

CMT has the following features.

• Selection of four counter input clocks

Any of four internal clocks (P

φ/8, Pφ/32, Pφ/128, and Pφ/512) can be selected independently

for each channel.

• Interrupt request on compare match

• When not in use, CMT can be stopped by halting its clock supply to reduce power

consumption.

Figure 13.1 shows a block diagram of CMT.

Control circuit

Clock selection

Channel 0

Channel 1

CMT

φ/8

φ/32

φ/128

φ/512

φ/8

φ/32

φ/128

φ/512

Clock selection

Control circuit

[Legend]

CMSTR:

Compare match timer start register

CMCSR:

Compare match timer control/status register

CMCOR:

Compare match timer constant register

CMCNT:

Compare match counter

CMI:

Compare match interrupt

Module bus

Bus

interface

Internal bus

CMI0

CMI1

Figure 13.1 Block Diagram of Compare Match Timer

HD6417618 Datasheet(PDF) 347 Page - Renesas Technology Corp

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