HD6417618 datasheet(290/646 Pages) RENESAS

290 / 646 page

Section 11 Ethernet Controller (EtherC)

Rev. 6.00 Jun. 12, 2007 Page 258 of 610

REJ09B0131-0600

11.6

Usage Notes

• Conditions for Setting LCHNG Bit

Even if the level of the signal input to the LNKSTA pin is not changed, the LCHNG bit in

ECSR may be set. It may happen when the pin function is changed from port to LNKSTA by

PCCRH2 of the PFC or when a software reset caused by the SWR bit in EDMR is cleared

while the LNKSTA pin is being driven high.

This is because the LNKSTA signal is internally fixed low when the pin functions as a port or

during the software reset state regardless of the external pin level.

Clear the LCHNG bit before setting the LCHNGIP bit in ECSIPR not to request a LINK signal

changed interrupt accidentally.

• Flow Control Defect 1

Once a PAUSE frame is received while the receiving flow control is enabled in full-duplex

mode (the RXF bit in ECMR = 1), each time when the local station receives a normal unicast

frame (non-PAUSE frame without a CRC error), the TIME parameter specified by the PAUSE

frame that has been previously received is incorrectly applied. As a result, unnecessary waiting

time is generated to slow down the transmission throughput. The TIME parameter value is

maintained until another PAUSE frame is received.

This defect can be prevented if the destination station supports the function to transmit the 0

time PAUSE frame as the same as this LSI does. Enable the use of 0 time PAUSE frame in this

LSI (the ZPF bit in ECMR = 1) before the 0 time PAUSE frame is received from the

destination station. This clears the TIME parameter incorrectly maintained in the EtherC and

prevents the unnecessary waiting time for transmission to be generated.

• Flow Control Defect 2

When a PAUSE period is generated while the transmitting/receiving flow control is enabled in

full-duplex mode (the TXF/RXF bit in ECMR = 1), non-PAUSE frames are waited for

transmission (this is a normal operation) whereas PAUSE frames are incorrectly waited for

transmission. The transmission of non-PAUSE frames in a PAUSE period is prohibited,

though the transmission of PAUSE frames is enabled in IEEE802.3.

When a PAUSE period is generated by the request from the destination station (that is, a

PAUSE frame is received from the destination station), the load of the destination station is

high and that of the local station is not so high. Therefore, the transmission of PAUSE frames

during this period is less likely to happen. The ratio that this defect actually affects the

operation in this LSI is rather low.

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