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HD6417618 Datasheet(PDF) 142 Page - Renesas Technology Corp |
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HD6417618 Datasheet(HTML) 142 Page - Renesas Technology Corp |
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142 / 646 page ![]() Section 7 Bus State Controller (BSC) Rev. 6.00 Jun. 12, 2007 Page 110 of 610 REJ09B0131-0600 Area P4 (H'E0000000 to H'EFFFFFFF) is an I/O area and is allocated to internal register addresses. Therefore, area P4 does not become shadow space. Area 0 (CS0) H'00000000 H'20000000 H'40000000 H'60000000 H'80000000 H'A0000000 H'C0000000 H'E0000000 Area 1 (reserved) Area 2 (reserved) Area 3 (CS3) Area 4 (CS4) Area 5A (reserved) Area 6A (reserved) Area 7 (reserved) Physical address space Address Space P0 P1 P2 P3 P4 Area 5B (CS5B) Area 6B (CS6B) Figure 7.2 Address Space 7.3.3 Address Map The external address space has a capacity of 256 Mbytes and is divided into five areas. Types of memory to be connected and the data bus width are specified for individual areas. The address map for the external address space is shown in table 7.2. Table 7.2 Address Map 1 (CMNCR.MAP = 0) Physical Address Area Memory to be Connected Capacity H'00000000 to H'03FFFFFF Area 0 Normal memory 64 Mbytes H'04000000 to H'07FFFFFF Area 1 Reserved area* 64 Mbytes H'08000000 to H'0BFFFFFF Area 2 Reserved area* 64 Mbytes H'0C000000 to H'0FFFFFFF Area 3 Normal memory Byte-selection SRAM SDRAM 64 Mbytes |
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