HD6417618 datasheet(141/646 Pages) RENESAS

141 / 646 page

Section 7 Bus State Controller (BSC)

Rev. 6.00 Jun. 12, 2007 Page 109 of 610

REJ09B0131-0600

Abbreviation

I/O

Function

IOIS16

Input

PCMCIA 16-bit I/O Signal

Enabled only in little endian mode.

Drive this signal low in big endian mode.

DQMLU,

DQMLL

Output

Connected to the DQMxx pin when SDRAM is in use.

DQMLU: Select signal for D15 to D8

DQMLL: Select signal for D7 to D0

WAIT

Input

External wait input

MD5, MD3

Input

MD5: Selects data alignment (big endian or little endian)

MD3: Specifies area 0 bus width (8/16 bits)

Note:

As pins A25 to A16 act as general I/O ports immediately after a power-on reset, pull up

or pull down these pins outside the LSI as needed.

7.3

Area Overview

7.3.1

Area Division

The architecture of this LSI has 32-bit address space. The upper three address bits divide the space

into areas P0 to P4, and the cache access methods can be specified for each area. For details, see

section 3, Cache. Each area indicated by the remaining 29 bits is divided into ten areas (five areas

are reserved) when address map 1 is selected or eight areas (three areas are reserved) when address

map 2 is selected. The address map is selected by the MAP bit in CMNCR. The BSC controls the

areas indicated by the 29 bits.

As listed in tables 7.2 and 7.3, memory can be connected directly to five physical areas of this LSI,

and the chip select signals (

CS0, CS3, CS4, CS5B, and CS6B) are output for each area. CS0 is

asserted during area 0 access.

7.3.2

Shadow Area

Areas 0, 3, 4, 5B, and 6B are divided by decoding physical address bits A28 to A25, which

correspond to areas 000 to 111. Address bits 31 to 29 are ignored. This means that the range of

area 0 addresses, for example, is H'00000000 to H'03FFFFFF, and its corresponding shadow space

is the address space in P1 to P3 areas obtained by adding to it H'20000000

× n (n = 1 to 6).

The address range for area 7 is H'1C000000 to H'1FFFFFFF. The address space H'1C000000 +

H'20000000

× n to H'1FFFFFFF + H'20000000 × n (n = 0 to 6) corresponding to the area 7

shadow spaces are reserved, so do not use it.

HD6417618 Datasheet(PDF) 141 Page - Renesas Technology Corp

HD6417618 Datasheet(HTML) 141 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL