HD6417618 datasheet(499/646 Pages) RENESAS

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Section 17 I/O Ports

Rev. 6.00 Jun. 12, 2007 Page 467 of 610

REJ09B0131-0600

17.5.1

Port E is a 25-bit I/O port that has the following registers. For details on the addresses of these

registers and the states of these registers in each processing state, see section 20, List of Registers.

• Port E data register H (PEDRH)

• Port E data register L (PEDRL)

17.5.2

Port E Data Registers H and L (PEDRH and PEDRL)

PEDRH and PEDRL are 16-bit readable/writable registers that store data for port E. Bits PE24DR

to PE0DR correspond to pins PE24 to PE00. (Description of multiplexed functions is omitted.)

When the pin function is general output port, if the value is written to PEDRH or PEDRL, the

value is output from the pin; if PEDRH or PEDRL is read, the value written to the register is

directly read regardless of the pin state.

When the pin function is general input port, not the value of register but pin state is directly read if

PEDRH or PEDRL is read. Data can be written to PEDRH or PEDRL but no effect on the pin

state. Table 17.5 shows the reading/writing function of the port E data registers H and L.

• PEDRH

Bit

Bit Name

Initial

Value

R/W

Description

15 to 9



All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

PE24DR

R/W

See table 17.5.

PE23DR

R/W

PE22DR

R/W

PE21DR

R/W

PE20DR

R/W

PE19DR

R/W

PE18DR

R/W

PE17DR

R/W

PE16DR

R/W

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