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HD6417618 Datasheet(PDF) 418 Page - Renesas Technology Corp |
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HD6417618 Datasheet(HTML) 418 Page - Renesas Technology Corp |
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418 / 646 page  Section 14 Serial Communication Interface with FIFO (SCIF) Rev. 6.00 Jun. 12, 2007 Page 386 of 610 REJ09B0131-0600 SPTRW: SCSPTR write SPTRR: SCSPTR read Note: * These signals control the SCK pin according to the settings of the C/ A bit in SCSMR and bits CKE1 and CKE0 in SCSCR. Reset Internal data bus Clock output enable signal* Sirial clock output signal* Serial clock input signal* Serial input enable signal* Bit 3 Bit 2 Reset QD R SCKIO SCK2 C QD R SCKDT SPTRW SPTRW SPTRR C Figure 14.21 SCKIO Bit, SCKDT bit, and SCK Pin SPTRW: SCSPTR write Reset Internal data bus Transmit enable signal Bit 1 Bit 0 Reset Serial transmit data QD R SPBIO TxD C QD R SPBDT SPTRW SPTRW C Figure 14.22 SPBIO Bit, SPBDT bit, and TxD Pin |
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