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HD6417618 Datasheet(PDF) 414 Page - Renesas Technology Corp

Part # HD6417618
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
PDF  646 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6417618 Datasheet(HTML) 414 Page - Renesas Technology Corp

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Section 14 Serial Communication Interface with FIFO (SCIF)
Rev. 6.00 Jun. 12, 2007 Page 382 of 610
REJ09B0131-0600
Transmitting and Receiving Serial Data Simultaneously (Synchronous Mode): Figure 14.18
shows a sample flowchart for transmitting and receiving serial data simultaneously.
Start of transmission and reception
Initialization
Read TDFE flag in SCFSR
TDFE = 1?
Write transmit data to SCFTDR
Read TDFE and TEND flags
in SCFSR while they are 1, then
clear them to 0
Read ORER flag in SCLSR
ORER = 1?
Read RDF flag in SCFSR
RDF = 1?
Clear TE and RE bits
in SCSCR to 0
End of transmission and reception
Read receive data in
SCFRDR, and clear RDF
flag in SCFSR to 0
All data received?
No
No
Yes
No
No
Yes
Yes
[1] SCIF status check and transmit data
write:
Read SCFSR and check that the
TDFE flag is set to 1, then write
transmit data to SCFTDR. Read the
TDFE and TEND flags while they are
1, then clear them to 0. The transition
of the TDFE flag from 0 to 1 can also
be identified by a TXI interrupt.
[2] Receive error handling:
Read the ORER flag in SCLSR to
identify any error, perform the
appropriate error handling, then clear
the ORER flag to 0. Reception cannot
be resumed while the ORER flag is
set to 1.
[3] SCIF status check and receive data
read:
Read SCFSR and check that RDF =
1, then read the receive data in
SCFRDR, and clear the RDF flag to
0. The transition of the RDF flag from
0 to 1 can also be identified by an RXI
interrupt.
[4] Serial transmission and reception
continuation procedure:
To continue serial transmission and
reception, read 1 from the RDF flag
and the receive data in SCFRDR, and
clear the RDF flag to 0 before
receiving the MSB in the current
frame. Similarly, read 1 from the
TDFE flag to confirm that writing is
possible before transmitting the MSB
in the current frame. Then write data
to SCFTDR and clear the TDFE flag
to 0.
[1]
Yes
Error handling
[4]
When switching from a transmit operation
or receive operation to simultaneous
transmission and reception operations,
clear the TE and RE bits to 0, and then
set them simultaneously to 1.
Note:
[3]
[2]
Figure 14.18 Sample Flowchart for Transmitting/Receiving Serial Data



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