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STCMB1 Datasheet(PDF) 27 Page - STMicroelectronics |
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STCMB1 Datasheet(HTML) 27 Page - STMicroelectronics |
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27 / 59 page ![]() DocID028958 Rev 4 27/59 STCMB1 Application information 59 7.13 PFC: Dynamic OVP and feedback failure protection (latched) The STCMB1 is equipped with PFC protections to prevent failures due to an excessive PFC voltage. The dynamic overvoltage protection (OVP) is non-latch protection dedicated to prevent an excessive increasing of the PFC output voltage caused by load transients that may happen because of the typically limited bandwidth of the PFC output voltage regulation loop. In this case an internal comparator monitoring the PFC output voltage via the FB pin (#3) stops the switching activity if the voltage at the pin reaches the threshold VFB_S (2.675 V typ.) and will allow the restarting if the voltage on the pin decreases to VFB_R (2.55 V typ.). An additional protection against overvoltages caused by a PFC loop failure (disconnection) is also integrated in the STCMB1 device: in case the voltage on the FB pin (#3) drops to the threshold VFB_D (0.45 V typ.) an internal comparator stops the switching activity of both converters, latching the IC operation. The HV start-up is activated to keep the latch condition. The latch condition will be cleared by unplugging the power supply from the mains. In case a latch protection is needed for other purposes as the LLC open loop or OTP it is possible latch the whole STCMB1 by tie the FB pin to GND by an open collector or an open drain transistor. The mentioned protection thresholds are in tracking with the internal reference of the IC and therefore will have a similar tolerance as the PFC error amplifier reference. Figure 13. Dynamic OVP and feedback failure protection operating waveforms In Figure 14 the waveforms in case of the Dynamic OVP and feedback failure protection intervention have been captured. In case of the intervention of Dynamic OVP (left picture) we can see a case of load disconnection: the error amplifier output starts decreasing but the narrow bandwidth of the loop do not allow a fast response, in the meantime the PFC output voltage has increased. The FB pin voltage has increased proportionally and when that voltage has crossed the threshold the PFC has stopped the switching activity. We can also see on the picture that the COMP pin level is well above the burst mode threshold and therefore the stopping of switching activity is not due to the burst mode comparator. The PFC restarts switching when the FB voltage decreases at 2.55 V. Considering the nominal PFC output voltage we can calculate the Dynamic OVP threshold as: VPFC_DOVP = VPFC • 1.06. |
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