CY8C3865LTI-059 datasheet(106/129 Pages) CYPRESS

106 / 129 page

PSoC® 3: CY8C38 Family

Data Sheet

Document Number: 001-11729 Rev. *R

Page 106 of 129

Figure 11-68. Asynchronous Write Cycle Timing

Table 11-66. Asynchronous Read Cycle Specifications

Parameter

Description

Conditions

Min

Typ

Max

Units

EMIF clock period[46]

Vdda

≥ 3.3 V

30.3

–

Tcel

EM_CEn low time

2T – 5

–

2T+ 5

Taddrv

EM_CEn low to EM_Addr valid

–

Taddrh

Address hold time after EM_Wen high

–

Toel

EM_OEn low time

2T – 5

–

2T + 5

Tdoesu

Data to EM_OEn high setup time

T + 15

–

Tdoeh

Data hold time after EM_OEn high

–

Address

Taddrh

Tcel

Taddrv

EM_ Addr

EM_CEn

EM_ WEn

EM_OEn

EM_ Data

Twel

Tdcev

Tdweh

Data

Note

46. Limited by GPIO output frequency, see Table 11-10 on page 74.

Table 11-67. Asynchronous Write Cycle Specifications

Parameter

Description

Conditions

Min

Typ

Max

Units

EMIF clock period[46]

Vdda

≥ 3.3 V

30.3

–

Tcel

EM_CEn low time

T – 5

–

T + 5

Taddrv

EM_CEn low to EM_Addr valid

–

Taddrh

Address hold time after EM_WEn high

–

Twel

EM_WEn low time

T – 5

–

T + 5

Tdcev

EM_CEn low to data valid

–

Tdweh

Data hold time after EM_WEn high

–

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