CY8C3865LTI-059 datasheet(65/129 Pages) CYPRESS

65 / 129 page

PSoC® 3: CY8C38 Family

Data Sheet

Document Number: 001-11729 Rev. *R

Page 65 of 129

11.2 Device Level Specifications

Specifications are valid for –40 °C

≤ TA ≤ 85 °C and TJ ≤ 100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V,

except where noted.

11.2.1 Device Level Specifications

Table 11-2. DC Specifications

Parameter

Description

Conditions

Min

Typ

Max

Units

VDDA

Analog supply voltage and input to analog

core regulator

Analog core regulator enabled

1.8

–

5.5

VDDA

Analog supply voltage, analog regulator

bypassed

Analog core regulator disabled

1.71

1.8

1.89

VDDD

Digital supply voltage relative to VSSD

Digital core regulator enabled

1.8

–

VDDA[19]

VDDD

Digital supply voltage, digital regulator

bypassed

Digital core regulator disabled

1.71

1.8

1.89

VDDIO[20]

I/O supply voltage relative to VSSIO

1.71

–

VDDA[19]

VCCA

Direct analog core voltage input (Analog

regulator bypass)

Analog core regulator disabled

1.71

1.8

1.89

VCCD

Direct digital core voltage input (Digital

regulator bypass)

Digital core regulator disabled

1.71

1.8

1.89

IDD[21]

Active Mode, VDD = 1.71 V–5.5 V

Bus clock off. Execute from CPU

instruction buffer. See “Flash Program

Memory” on page 21.

CPU at 3 MHz

T = –40 °C

–

T = 25 °C

–

0.8

–

T = 85 °C

–

CPU at 6 MHz

T = –40 °C

–

T = 25 °C

–

1.2

–

T = 85 °C

–

CPU at 12 MHz

T = –40 °C

–

T = 25 °C

–

2.0

–

T = 85 °C

–

CPU at 24 MHz

T = –40 °C

–

T = 25 °C

–

3.5

–

T = 85 °C

–

CPU at 48 MHz

T = –40 °C

–

T = 25 °C

–

6.6

–

T = 85 °C

–

CPU at 62.6 MHz

T = –40 °C

–

T = 25 °C

–

9.0

–

T = 85 °C

–

VDD = 3.3 V, T = 25 °C, IMO and bus clock

enabled, ILO = 1 kHz, CPU executing from

flash and accessing SRAM, all other

blocks off, all I/Os tied low.

CPU at 3 MHz

–

1.4

–

CPU at 6 MHz

–

2.2

–

CPU at 12 MHz

–

3.6

–

CPU at 24 MHz

–

6.4

–

CPU at 48 MHz

–

11.8

–

CPU at 62.6 MHz

–

15.8

–

Notes

19. The power supplies can be brought up in any sequence however once stable VDDA must be greater than or equal to all other supplies.

20. The VDDIO supply voltage must be greater than the maximum analog voltage on the associated GPIO pins. Maximum analog voltage on GPIO pin ≤ VDDIO ≤ VDDA.

21. The current consumption of additional peripherals that are implemented only in programmed logic blocks can be found in their respective data sheets, available in

PSoC Creator, the integrated design environment. To estimate total current, find CPU current at frequency of interest and add peripheral currents for your particular

system from the device data sheet and component data sheets.

[+] Feedback

CY8C3865LTI-059 Datasheet(PDF) 65 Page - Cypress Semiconductor

CY8C3865LTI-059 Datasheet(HTML) 65 Page - Cypress Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL