CY8C3865LTI-059 datasheet(23/129 Pages) CYPRESS

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PSoC® 3: CY8C38 Family

Data Sheet

Document Number: 001-11729 Rev. *R

Page 23 of 129

5.6 External Memory Interface

CY8C38 provides an EMIF for connecting to external memory

devices. The connection allows read and write accesses to

external memories. The EMIF operates in conjunction with

UDBs, I/O ports, and other hardware to generate external

memory address and control signals. At 33 MHz, each memory

access cycle takes four bus clock cycles. Figure 5-1 is the EMIF

block diagram. The EMIF supports synchronous and

asynchronous memories. The CY8C38 supports only one type

of external memory device at a time. External memory can be

accessed through the 8051 xdata space; up to 24 address bits

can be used. See “xdata Space” section on page 25. The

memory can be 8 or 16 bits wide.

Figure 5-1. EMIF Block Diagram

PHUB

IO IF

UDB

EMIF

I/O

PORTs

I/O

PORTs

I/O

PORTs

Data,

Address,

and Control

Signals

Data,

Address,

and Control

Signals

Address Signals

Data Signals

Control Signals

Data,

Address,

and Control

Signals

EM Control

Signals

Other

Control

Signals

DSI Dynamic Output

Control

DSI to Port

Control

External_ MEM_ DATA[15:0]

External_ MEM_ ADDR[23:0]

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