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34708 Datasheet(PDF) 140 Page - Freescale Semiconductor, Inc

Part # 34708
Description  Power Management Integrated Circuit (PMIC) for i.MX50/53 Families
PDF  159 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

34708 Datasheet(HTML) 140 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
Freescale Semiconductor
140
MC34708
Functional Block Description
TSEN
12
R/W
DIGRESETB
0x0
Enable the Touch screen from low power mode.
TSSTART
13
R/W
DIGRESETB
0x0
Request a start of the ADC Reading Sequencer for Touch
screen readings.
TSCONT
14
R/W
DIGRESETB
0x0
Run ADC reads of Touch screen continuously when high or
one time when low.
TSHOLD
15
R/W
DIGRESETB
0x0
Hold the ADC reading Sequencer while saved Touch screen
results are read from SPI
TSSTOP[2:0]
18-16
R/W
DIGRESETB
0x0
Just like the ADSTOP above, but for the Touchscreen read
programming. This will allow independent code for ADC
Sequence readings and touchscreen ADC Sequence
readings.
Spare
19
R/W
DIGRESETB
0x0
Not available
TSPENDETEN
20
R/W
DIGRESETB
0x0
Enable the Touchscreen Pen Detection. Note that TSEN
must be off for Pen Detection.
Spare
23-21
R/W
DIGRESETB
0x0
Not available
Table 148. Register 44, ADC 1
Name
Bit #
R/W
Reset
Default
Description
ADDLY1[3:0]
3-0
R/W
DIGRESETB
0x0
This will allow delay before the ADC readings.
ADDLY2[3:0]
7:4
R/W
DIGRESETB
0x0
This will allow delay between each of ADC readings in a set.
ADDLY3[3:0]
11-8
R/W
DIGRESETB
0x0
This will allow delay after the set of ADC readings. This delay
is only valid between subsequent wrap around reading
sequences with ADCONT
TSDLY1[3:0]
15-12
R/W
DIGRESETB
0x0
This will allow delay before the ADC Touch screen readings.
This is like the ADDLY1, but allows independent
programming of touchscreen readings from general purpose
ADC readings to prevent code replacement in the system.
TSDLY2[3:0]
19-16
R/W
DIGRESETB
0x0
This will allow delay between each of ADC Touch screen
readings in a set. This is like the ADDLY2, but allows
independent programming of touchscreen readings from
general purpose ADC readings to prevent code replacement
in the system.
TSDLY3[3:0]
23-20
R/W
DIGRESETB
0x0
This will allow delay after the set of ADC Touch screen
readings. This delay is only valid between subsequent wrap
around reading sequences with TSCONT mode. This is like
the ADDLY3, but allows independent programming of
touchscreen readings from general purpose ADC readings
to prevent code replacement in the system.
Table 149. Register 45, ADC 2
Name
Bit #
R/W
Reset
Default
Description
ADSEL0[3:0]
3-0
R/W
DIGRESETB
0x0
Channel Selection to place in ADRESULT0
ADSEL1[3:0]
7-4
R/W
DIGRESETB
0x0
Channel Selection to place in ADRESULT1
ADSEL2[3:0]
11-8
R/W
DIGRESETB
0x0
Channel Selection to place in ADRESULT2
ADSEL3[3:0]
15-12
R/W
DIGRESETB
0x0
Channel Selection to place in ADRESULT3
Table 147. Register 43, ADC 0
Name
Bit #
R/W
Reset
Default
Description



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