HD6417618 datasheet(300/646 Pages) RENESAS

300 / 646 page

Section 12 Ethernet Controller Direct Memory Access Controller (E-DMAC)

Rev. 6.00 Jun. 12, 2007 Page 268 of 610

REJ09B0131-0600

Bit

Bit Name

Initial

value

R/W

Description

R/W

Frame Reception

Indicates that a frame has been received and the

receive descriptor has been updated. This bit is set to

1 each time a frame is received.

0: Frame not received

1: Frame received

RDE

R/W

Receive Descriptor Empty

When receive descriptor empty (RDE = 1) occurs,

receiving can be restarted by setting RACT = 1 in the

receive descriptor and initiating receiving.

0: Receive descriptor active bit RACT = 1 not

detected

1: Receive descriptor active bit RACT = 0 detected

RFOF

R/W

Receive FIFO Overflow

Indicates that the receive FIFO has overflowed during

frame reception.

0: Overflow has not occurred

1: Overflow has occurred

15 to 12



All 0

Reserved

These bits are always read as 0. The write value

should always be 0.

CND

R/W

Carrier Not Detect

Indicates the carrier detection status.

0: A carrier is detected when transmission starts

1: A carrier is not detected when transmission starts

DLC

R/W

Detect Loss of Carrier

Indicates that loss of the carrier has been detected

during frame transmission.

0: Loss of carrier not detected

1: Loss of carrier detected

R/W

Delayed Collision Detect

Indicates that a delayed collision has been detected

during frame transmission.

0: Delayed collision not detected

1: Delayed collision detected

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